Computers are ubiquitous in today's society. They come in all different varieties and can be found in places such as automobiles, laptops or home personal computers, banks, personal digital assistants, cell phones, as well as many businesses. In addition, as computers become more commonplace and software becomes more complex, there is a need for the computing devices to perform at faster and faster speeds. For example, newer microprocessors often have higher operating frequencies than previous generations of microprocessors. As a result of the increased operating frequencies, newer generations of microprocessors may consume more power than previous generations of microprocessors.
To address this increase in consumption of power, many microprocessors now incorporate dynamic voltage frequency scaling (DVFS) to reduce the power consumed by the microprocessor. In general, DVFS techniques adjust the clock frequency at which the different cores of the microprocessor operate such that those cores consume less power. The scaling of the operating frequency of the one or more cores to a lower frequency may occur in response to the microprocessor detecting a lower processing requirement for the one or more cores. As a result, however, the cores of the microprocessor operate at varying clock frequencies as DVFS techniques are applied to the processor to reduce power consumption. In multithreaded microprocessors, the individual cores may be operating at a different frequency than the other cores of the microprocessor. The operation of a microprocessor at varying frequencies often introduces synchronization issues for communication between programs being executed by the cores of the microprocessor and between the microprocessor and other components of a computer system.
One such synchronization issue involves the scheduling and synchronization of software being executed by the microprocessor. Typically, a wide variety of software programs need access to a constant frequency clock, or constant timer signal, to synchronize operations between executing programs and communication with components of a computer system. Before the advent of DVFS, the constant timer signal was simply based on the constant core clock frequency of the microprocessor. However, with the cores of the microprocessor operating at varying frequencies, such reliance on the core clock signals is not available. Thus, techniques are described herein that provide a constant timing signal for executing software on a microprocessor that utilizes power saving techniques such as DVFS that vary the operating clock frequency of the microprocessor.
It is with these and other issues in mind that various aspects of the present disclosure were developed.